As a semiconductor device for electric power control, which achieves both a high breakdown voltage and low on-resistance, there is a vertical type Metal Oxide Semiconductor Field Effect Transistor (MOSFET) that has a Super Junction structure (hereinafter, referred to as an “SJ structure”) in which p type (or n type) semiconductor regions are embedded in n type (or p type) semiconductor regions and n type regions and p type regions are alternately arranged with each other.
In the SJ structure, pseudo non-doped areas are prepared by matching the n type dopant amount included in the n type regions and p type dopant amount included in the p type regions, and thus high breakdown voltage is provided. At the same time, it is also possible to increase the dopant concentration in the n type regions to lower on-resistance.
As one method of forming the SJ structure, there is, for example, a method of forming trenches in an n type semiconductor layer, and then embedding p type semiconductor material in the trenches thus formed. However, in this method, cavity parts (voids) are often left in the p type semiconductors due to incomplete filling of the trenches with the p type semiconductor material. If the voids are formed, there is a problem in that leakage current can be increased due to stress caused by the cavity parts.
When the pitches of the SJ structure are reduced in order to reduce on-resistance in a MOSFET device, the aspect ratio of the trenches into which the p type semiconductor material is to be embedded becomes high. Therefore, the problem of the formation of the cavity parts becomes even more prevalent, and thus the manufacture is difficult.